ARM ARM Certifications EN0-001 Questions & Answers

• Question 81:

  When an interrupt service routine reads the Generic Interrupt Controller (GIC) Interrupt Acknowledge Register, what state transition occurs for that interrupt ID?

  A. Inactive to Active

  B. Inactive to Pending

  C. Active to Inactive

  D. Pending to Active

  Correct Answer: D

• Question 82:

  Which of the following is an accurate description of network storage as compared to on-chip RAM?

  A. It has lower capacity

  B. It is quicker to access

  C. It is always available

  D. It is easy to share with other devices

  Correct Answer: D

• Question 83:

  Which TWO of the following options are DISADVANTAGES of building source code to use software floating point? (Choose two)

  A. Not all floating point arithmetic operations are supported

  B. Floating point calculations have lower performance than hardware floating point

  C. The stack cannot be used to pass floating point function arguments

  D. The results of floating point calculations will be less accurate

  E. The resulting code will be larger

  Correct Answer: BE

• Question 84:

  Is it possible to use an interrupt controller based on the Generic Interrupt Controller (GIC) architecture in a device built around a single core Cortex-A9 MPCore processor?

  A. No, they are completely incompatible

  B. Yes, all Cortex-A9 MPCore processors include an integrated GIC

  C. Yes, but a dummy second processor has to be included

  D. No, a GIC is only compatible with multi-core Cortex-A9 processors

  Correct Answer: B

• Question 85:

  If the processor is in User mode and then an IRQ interrupt occurs:

  A. CPSR mode bits are set to User mode and SPSR _User mode bits are set to IRQ.

  B. CPSR mode bits are set to IRQ and SPSR_Irq mode bits are set to User.

  C. CPSR mode bits are set to IRQ and SPSR_Irq mode bits are set to IRQ.

  D. CPSR mode bits are set to User and SPSR User mode bits are set to IRQ.

  Correct Answer: B

• Question 86:

  The effect of clicking the Stop button in a debugger is to:

  A. Put the processor(s) into debug state.

  B. Force the processor to execute a BKPT instruction

  C. Hold the processor in a Reset condition

  D. Re-initialize the memory contents.

  Correct Answer: A

• Question 87:

  In a loop termination test, how might a programmer indicate to the compiler that the loop iteration count limit is divisible by four?

  A. AND the count limit with -0x3

  B. Add 4 to the count limit

  C. Subtract 4 from the count limit

  D. Shift the count limit left two bit positions

  Correct Answer: A

• Question 88:

  Which TWO of the following mechanisms cause the ARM processor to take an abort? (Choose two)

  A. MPU fault

  B. External memory system error

  C. Bounced coprocessor instruction

  D. Unrecognized instruction opcode

  E. Illegal operands for a data-processing instruction

  Correct Answer: AB

• Question 89:

  An Advanced SIMD intrinsic has the prototype:

  uint8xl6x2_t vld2q_u8 (uint8_t const * ptr);

  How many bytes does this intrinsic load from memory?

  A. 2

  B. 16

  C. 32

  D. 256

  Correct Answer: C

• Question 90:

  In which of these cases would code have better performance when compiled for Thumb state than when compiled for ARM state?

  A. When the processor has no data cache

  B. When the code involves many shifting operations

  C. When the code has many conditionally executed instructions

  D. When the processor can only fetch instructions 16-bits at a time

  Correct Answer: D