ARM EN0-001 Online Practice Questions and Exam Preparation

ARM EN0-001 Online Questions & Answers

• Question 81:

  A standard performance benchmark is being run on a single core ARM v7-A processor. The performance results reported are significantly lower than expected. Which of the following options is a possible explanation?

  A. L1 Caches and branch prediction are disabled
  B. The Embedded Trace Macrocell (ETM) is disabled
  C. The Memory Management Unit (MMU) is enabled
  D. The Snoop Control Unit (SCU) is disabled
  A. L1 Caches and branch prediction are disabled

• Question 82:

  A development board is supplied with a Board Support Package (BSP) for a particular operating system. Which TWO of these items would you expect to find in the BSP? (Choose two)

  A. Power supply and electrical cables
  B. Debugging hardware and software solution
  C. System on chip peripheral driver source code
  D. Boundary scan protocol definition
  E. Boot code for board-specific devices
  C. System on chip peripheral driver source code
  E. Boot code for board-specific devices

• Question 83:

  A program running on a development board that is connected to a host using a debugger can access a file on the host by using:

  A. Memory mapping
  B. Semihosting
  C. Polling
  D. Virtual I/O
  B. Semihosting

• Question 84:

  Capturing processor execution trace is characterized as being:

  A. Influenced by breakpoints.
  B. Intrusive on normal processor operation.
  C. Inaccurate regarding code execution history.
  D. Not intrusive on normal processor operation.
  D. Not intrusive on normal processor operation.

• Question 85:

  Consider the following piece of code:

  

  The value of r7 after execution of the above piece of code is:

  A. 0xAA.
  B. 0x00.
  C. 0xBB.
  D. Unpredictable.
  A. 0xAA.

• Question 86:

  Which of these processors is only available as a single core configuration?

  A. Cortex-A5
  B. Cortex-A8
  C. Cortex-A9
  D. Cortex-A15
  B. Cortex-A8

• Question 87:

  Which of the following is an accurate description of network storage as compared to on-chip RAM?

  A. It has lower capacity
  B. It is quicker to access
  C. It is always available
  D. It is easy to share with other devices
  D. It is easy to share with other devices

• Question 88:

  An advantage of native compiling over cross compiling is that:

  A. It can enable the final code to be smaller, and execute more quickly.
  B. It allows greater parallelism when building code by utilizing many processors.
  C. The compiler is able to produce error and warning messages in a range of languages.
  D. Build scripts can detect details of the target, and automatically configure the build to match.
  D. Build scripts can detect details of the target, and automatically configure the build to match.

• Question 89:

  An embedded application running on an ARM processor is not meeting its expected performance target. The target hardware on which the application is running allows the frequency of the CPU to be increased independently from the

  memory system.

  The CPU frequency is increased from 800 MHz to 1 GHz and experiments verify that the application performance does not increase.

  Which one of the following statements MUST BE TRUE?

  A. The performance is limited by something other than the CPU
  B. The cache hit rate has gone down
  C. The measurement methodology is flawed and the experiment needs to be repeated
  D. The operating system is performing more context switches
  A. The performance is limited by something other than the CPU

• Question 90:

  In a Cortex-A processor, after which TWO of these events is a cache maintenance operation required to ensure reliable code execution? (Choose two)

  A. Processor reset
  B. Switching from ARM to Thumb state
  C. Changing the access permissions of a page
  D. Executing a Data Memory Barrier instruction
  E. Loading data from an unaligned memory address
  A. Processor reset
  C. Changing the access permissions of a page